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Transactional Memory (Synthesis Lectures on Computer Architecture)

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Manufacturer: Morgan & Claypool Publishers Average Customer Rating: Average rating of 5.0/5Average rating of 5.0/5Average rating of 5.0/5Average rating of 5.0/5Average rating of 5.0/5

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Transactional Memory (Synthesis Lectures on Computer Architecture)

Binding: Paperback
Dewey Decimal Number: 004
EAN: 9781598291247
ISBN: 1598291246
Label: Morgan & Claypool Publishers
Manufacturer: Morgan & Claypool Publishers
Number Of Items: 1
Number Of Pages: 222
Publication Date: 2007-01-12
Publisher: Morgan & Claypool Publishers
Release Date: 2007-01-11
Studio: Morgan & Claypool Publishers
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Spotlight customer reviews:
Customer Rating: Average rating of 5/5Average rating of 5/5Average rating of 5/5Average rating of 5/5Average rating of 5/5
Summary: From a fellow researcher
Comment: I am a researcher, currently investigating transactional memory. This book is outstanding in its presentation of the current developments in both STM and HTM.

I strongly recommend it to anyone interested in transactional memory, especially as fast way to familiarize yourself with the current state of the field.

Brilliant book. Thank you for writing it!

 
Editorial Reviews:
The advent of multicore processors has renewed interest in the idea of incorporating transactions into the programming model used to write parallel programs. This approach, known as transactional memory, offers an alternative, and hopefully better, way to coordinate concurrent threads. The ACI (atomicity, consistency, isolation) properties of transactions provide a foundation to ensure that concurrent reads and writes of shared data do not produce inconsistent or incorrect results. At a higher level, a computation wrapped in a transaction executes atomically – either it completes successfully and commits its result in its entirety or it aborts. In addition, isolation ensures the transaction produces the same result as if no other transactions were executing concurrently. Although transactions are not a parallel programming panacea, they shift much of the burden of synchronizing and coordinating parallel computations from a programmer to a compiler, runtime system, and hardware. The challenge for the system implementers is to build an efficient transactional memory infrastructure. This book presents an overview of the state of the art in the design and implementation of transactional memory systems, as of early summer 2006.
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